sobjects/__init__.py
author Denis Laxalde <denis.laxalde@logilab.fr>
Mon, 09 Sep 2013 12:43:25 +0200
changeset 9322 2dae5bf5ea68
parent 8696 0bb18407c053
child 10614 57dfde80df11
permissions -rw-r--r--
[ReST] Implement a rql-table reST directive. Closes #3252856 allowing to call table or derivated view specify headers / cellvids. Also, rql may be split accross several lines which greatly improve readability.
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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# copyright 2003-2012 LOGILAB S.A. (Paris, FRANCE), all rights reserved.
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# contact http://www.logilab.fr/ -- mailto:contact@logilab.fr
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#
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# This file is part of CubicWeb.
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#
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# CubicWeb is free software: you can redistribute it and/or modify it under the
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# terms of the GNU Lesser General Public License as published by the Free
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# Software Foundation, either version 2.1 of the License, or (at your option)
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# any later version.
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#
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# CubicWeb is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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# FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for more
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# details.
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#
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# You should have received a copy of the GNU Lesser General Public License along
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# with CubicWeb.  If not, see <http://www.gnu.org/licenses/>.
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"""server side objects"""
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import os.path as osp
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def registration_callback(vreg):
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    vreg.register_all(globals().itervalues(), __name__)
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    global URL_MAPPING
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    URL_MAPPING = {}
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    if vreg.config.apphome:
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        url_mapping_file = osp.join(vreg.config.apphome, 'urlmapping.py')
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        if osp.exists(url_mapping_file):
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            URL_MAPPING = eval(file(url_mapping_file).read())
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            vreg.info('using url mapping %s from %s', URL_MAPPING, url_mapping_file)